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市场调查报告书
商品编码
1937414
共封装光学元件(CPO):市场占有率分析、产业趋势与统计、成长预测(2026-2031)Co-packaged Optics - Market Share Analysis, Industry Trends & Statistics, Growth Forecasts (2026 - 2031) |
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预计到 2025 年,共封装光学元件 (CPO) 市值将达到 1.2 亿美元,从 2026 年的 1.6 亿美元成长到 2031 年的 7.5 亿美元。
预计在预测期(2026-2031 年)内,复合年增长率将达到 35.92%。

硅光电整合技术最初主要处于实验阶段,如今受益于半导体製造的大规模生产和先进的封装技术,使超大规模营运商能够在降低电力消耗的同时,实现与 51.2 Tbps交换器硅晶相当的频宽密度。其成长动力源自于三大互补趋势:(1) 人工智慧训练丛集需要比传统云端架构更高的东西向频宽;(2) 北美和欧盟的能源效率法规优先考虑降低每Gigabit瓦功耗的解决方案;(3) 代工厂的普及(尤其是台积电的硅光电封装专案)降低了每条光通道的成本并产量比率了良率。由于光元件供应商、半导体製造商和新兴的硅光电专家都在竞相解决供应阻碍因素的异质整合难题,市场竞争仍然激烈。随着开放运算社群不断完善介面规范,共封装光元件市场可望从早期采用者阶段过渡到主流资料中心基础架构阶段。
博通的Bailly平台证明,在其Tomahawk 5交换器中整合八个6.4Tbps光引擎,与可插拔收发器相比,功耗降低了70%。由于传统电缆无法维持51.2Tbps ASIC所需的讯号完整性,超大规模营运商被迫重新评估其网路拓扑结构。 800G可插拔设备的机架级散热设计预算已接近实际极限,这加剧了经济差距,并促使采购部门将共封装光模组(CPO)视为必备技术,而非实验性计划。随着第三代200Gbit/s通道的CPO进入量产阶段,共封装光模组市场如今拥有了清晰的技术蓝图,与2026-2028年的交换器硅晶更新周期相契合。这使得设备OEM厂商能够加快设计采用速度,并确保中期需求的可预测性。
随着各大云端服务供应商宣布净零排放承诺,每Gigabit的电力消耗量指标日益受到关注。日月光(ASE)展示的低于5pJ/bit的光引擎证实,将光模组整合到交换器封装内可以降低DSP功耗并消除铜互连损耗。从欧盟碳定价机製到城市层级暂停新建资料中心,监管压力使得降低功耗成为基板挑战。业者提出与节能相关的三年投资回收期目标,同时推广采用共封装光学模组,以此在不超出站点电力预算的情况下提高机架密度。这种政策环境正在将技术优势转化为投资动力,并透过长期采购协议推动需求成长。
共封装光学元件 (CPO) 将硅光电、III-V族雷射和先进基板整合到毫米级机壳中。在键结高功率晶粒的同时,以数十奈米的精度对准光波导会在多个製程步骤中引入损耗。 NVIDIA 先进的 CoWoS 生产线在 Blackwell 量产爬坡阶段的产量比率下降凸显了此製程视窗的脆弱性。材料不匹配导致的热应力需要特殊的界面层和主动冷却,从而增加了元件数量和检测步骤。在技术成熟之前,批量供应将受到限制,这将延长二级 OEM 厂商的前置作业时间,并抑制共封装光学元件市场近期的出货量预测。
到2025年,3.2 Tbps光模组将占共封装光模组市场收入的37.92%,这反映了Tomahawk 4级交换器的装置量。然而,随着人工智慧丛集对更高速率光纤网路的需求不断增长,6.4 Tbps及更高速率的设备到2031年将以58.64%的复合年增长率成长。将单一6.4 Tbps引擎与51.2 Tbps ASIC晶片集成,可实现8条200 Gbit/s的光通道。这不仅将交换器到模组的功耗预算减半,还省去了重定时器级。厂商已製定了6.4 Tbps及更高速率蓝图,以配合2026年及以后的伺服器更新周期。
展望未来,晶圆代工厂的蓝图预测,12.8 Tbps 的引擎将在单一封装内堆迭多个光核心,其中最高频宽预计将超过所有其他资料速率等级。虽然低于 1.6 Tbps 的共封装光模组 (CPO) 仍然适用于成本优先于密度的边缘设备,但超大规模竞标檔案现在已将 200G/通道的讯号路径指定为标准。随着这一转变的推进,预计到 2029 年,用于 6.4 Tbps 及更高速率设备的共封装光模组的市场价值将超过所有低速率光模组市场价值的总和。
到2025年,光学引擎将占总收入的41.12%,而随着厂商掌握片上发光技术,雷射光源的复合年增长率将达到43.71%。采用中国产200mm硅晶圆製造的整合式磷化铟雷射阵列无需外部泵浦雷射器,并降低了封装高度,从而降低了材料成本并提高了可靠性。
由于控制器功能整合在封装内,电子积体电路的需求保持稳定,但其附加价值来源正转向雷射技术创新。整合光源无需光纤尾纤,使系统设计人员能够实现更薄的机架顶部交换机,从而释放前面板空间。因此,在超超大规模资料中心业者和雷射代工厂之间签订的多年供应协议的支持下,用于雷射元件的共封装光学元件的市场规模正从利基市场转向核心市场。
共封装光学元件 (CPO) 市场按资料速率(<1.6T、1.6T、3.2T 以上)、元件(光引擎、电子 IC、雷射源、连接器、封装等)、整合方法(板载光学元件、共封装光学元件)、最终用途(超大规模资料中心业者、资料中心、整合方法(板载光学元件、共封装光学元件)、最终用途(美国通讯业者和欧洲地区运营商、北美地区、其他地区)。
亚太地区预计到2025年将占全球营收的32.78%,年复合成长率达41.99%,主要得益于政府补贴和垂直整合的供应链。中国82亿元人民币(约1300亿日元)的补贴推动了8英寸硅光子光电的生产和雷射集成,从而降低了元器件成本。日本经济产业省已拨款3.05亿美元给NTT、英特尔和SK海力士,用于共同开发光晶片,从而加强日本国内的设计生态系统。韩国正透过调整其高频宽蓝图,使其与光介面技术相契合,从而对这项合作做出补充。
北美透过超大规模营运商满足了大部分终端用户需求。博通、英特尔和英伟达是该地区技术基础的支柱,而台积电位于亚利桑那州的晶圆厂则引入了本土封装能力,从而缩短了美国云端客户的前置作业时间。因此,共封装光学元件市场受益于晶片设计与内部消费相结合的闭合迴路,即使生产日益分散于全球各地,也巩固了该地区的市场份额。
互通性和永续性是欧洲的优先事项。总部位于欧盟的开放运算专案(OCP)负责开发介面设计并制定全球部署实务。碳定价立法进一步推动了部署,营运商透过将可插拔光学模组转向共封装装置,实现了30%至50%的节能。併购活动,例如诺基亚以23亿美元收购Infinera,显示该地区有意确保自身光纤通讯智慧财产权并提升价值链地位。
The co-packaged optics market was valued at USD 0.12 billion in 2025 and estimated to grow from USD 0.16 billion in 2026 to reach USD 0.75 billion by 2031, at a CAGR of 35.92% during the forecast period (2026-2031).

Silicon photonics integration, once largely experimental, now benefits from high-volume semiconductor manufacturing and advanced packaging, enabling hyperscale operators to pursue bandwidth densities that match 51.2 Tbps switch silicon while lowering power budgets. Growth momentum stems from three reinforcing trends: (1) AI training clusters require far denser east-west bandwidth than classic cloud architectures, (2) energy-efficiency mandates in North America and the EU prioritize solutions that trim watt-per-gigabit metrics, and (3) foundry participation-most visibly TSMC's silicon-photonics packaging programs-reduces cost per optical lane and improves yield. Competitive intensity remains high as optical component vendors, semiconductor houses, and new silicon-photonics specialists race to solve heterogeneous-integration challenges that still constrain supply. As open compute communities refine interface specifications, the co-packaged optics market is positioned to shift from early adopter status to mainstream data-center infrastructure.
Broadcom's Bailly platform showed how embedding eight 6.4 Tbps optical engines beside a Tomahawk 5 switch delivered 70% lower power draw than pluggable transceivers. Hyperscale operators consequently reassessed network topologies because legacy electrical traces could not sustain the signal integrity demanded by 51.2 Tbps ASICs. The economic gap widened when rack-level thermal budgets for 800G pluggables hit practical ceilings, prompting procurement teams to treat co-packaged optics as a necessity rather than a lab project. As the third-generation CPO with 200 Gbit/s lanes enters production, the co-packaged optics market gains a clear technical roadmap that aligns with 2026-2028 switch-silicon refresh cycles. Equipment OEMs, therefore, accelerate design wins, locking in demand visibility over the medium term.
Net-zero pledges published by major cloud providers intensified scrutiny on watts-per-gigabit metrics. ASE's demonstration of <5 pJ/bit optical engines confirmed that integrating optics inside the switch package cuts DSP power and eliminates copper trace losses. Regulatory pressure-from carbon-pricing schemes in the EU to city-level moratoriums on new data-center builds-made the power reduction a board-level issue. Operators outlined three-year payback targets tied to energy savings and, in parallel, positioned co-packaged optics as a lever to unlock higher rack densities without breaching site power envelopes. The policy environment, therefore, transforms a technical benefit into an investment imperative, boosting demand through long-term purchase agreements.
Co-packaged optics combines silicon photonics, III-V lasers, and advanced substrates inside a millimeter-scale envelope. Aligning optical waveguides to within tens of nanometers while also attaching high-power switch dice drives yields loss across multiple process steps. Recent yield slippages in advanced CoWoS lines, highlighted during NVIDIA's Blackwell ramp, underscore the fragile process window. Material-mismatch thermal stress necessitates exotic interface layers and active cooling, increasing part counts and inspection steps. Until learning curves mature, volume availability remains constrained, elongating lead times for tier-two OEMs and tempering near-term shipment forecasts for the co-packaged optics market.
Other drivers and restraints analyzed in the detailed report include:
For complete list of drivers and restraints, kindly check the Table Of Contents.
The 3.2 Tbps segment accounted for 37.92% of the co-packaged optics market revenue in 2025, reflecting the installed base of Tomahawk 4 class switches. However, >=6.4 Tbps devices are posting a 58.64% CAGR through 2031 as AI clusters press for higher radix fabrics. A single 6.4 Tbps engine co-located with a 51.2 Tbps ASIC yields eight optical lanes at 200 Gbit/s each, which halves the switch-to-module power budget and eliminates retimer stages. Vendors thus lock the >=6.4 Tbps roadmap into server refresh cycles beginning in 2026.
Looking forward, the foundry roadmaps project 12.8 Tbps engines that stack multiple optical cores within one package, positioning the top-end band to outgrow all other data-rate tiers. While sub-1.6 Tbps CPO remains viable for edge appliances where cost outranks density, hyperscale bidding documents now stipulate 200G/lane signal paths as a baseline. As this migration unfolds, the co-packaged optics market size for >=6.4 Tbps devices is set to outstrip the combined value of lower speed classes by 2029.
Optical engines represented 41.12% of 2025 revenue, yet laser sources are expanding at a 43.71% CAGR as vendors master on-chip light generation. China's integrated indium-phosphide laser arrays, produced on 200 mm silicon wafers, removed the need for external pump lasers and reduced package height, trimming material cost, and improved reliability.
Electronics ICs maintain steady demand as controller functions migrate on-package, but the incremental value pool is shifting toward laser innovation. With integrated sources eliminating fiber pigtails, system architects design slimmer top-of-rack switches and free front-panel real estate. The co-packaged optics market size for laser devices is therefore moving from niche to core, supported by multi-year supply agreements between hyperscalers and laser foundries.
Co-Packaged Optics Market is Segmented by Data Rate (< 1. 6T, 1. 6T, 3. 2T, and Above), Component (Optical Engine, Electrical IC, Laser Source, Connector and Packaging, and More), Integration Approach (On-Board Optics, and Co-Packaged Optics), End-Use Application (Hyperscale Cloud Data Centers, Enterprise Data Centers, and More), and Geography (North America, South America, Europe, Asia-Pacific, and Middle East and Africa).
Asia-Pacific commanded 32.78% of 2025 revenue and is advancing at a 41.99% CAGR, powered by government subsidies and vertically integrated supply. China's CNY 8.2 billion subsidy enabled eight-inch silicon-photonics wafer production and laser integration that compresses the bill-of-materials cost. Japan's Ministry of Economy, Trade and Industry funded USD 305 million for NTT, Intel, and SK Hynix to co-develop optical chips, strengthening local design ecosystems. South Korea complements the loop by aligning high-bandwidth memory roadmaps with optical interfaces.
North America supplies the bulk of end-user demand through hyperscale operators. Broadcom, Intel, and NVIDIA anchor the regional technology stack, while TSMC's Arizona fabs introduce domestic packaging capacity that shortens lead times for US cloud customers. The co-packaged optics market, therefore, benefits from a closed loop that links chip design to captive consumption, reinforcing the region's share even as production diversifies globally.
Europe prioritizes interoperability and sustainability. Open Compute Project chapters headquartered in the EU draft interface blueprints, shaping global deployment practices. Carbon-pricing legislation further propels adoption; operators document 30-50% power savings when shifting from pluggable optics to co-packaged lanes. M&A activity, typified by Nokia's USD 2.3 billion acquisition of Infinera, signals the region's intent to secure proprietary optical IP and climb the value chain.